Semiconductor wafers made from silicon, gallium arsenide, or germanium-silicon, etc. are processed through the circuit pattern lithography system while in the form of the wafer having large diameter, and undergo grinding on their backsides. Thereupon, the wafer is sent to the cutting (dicing) operation wherein it is cut into chips, and then to the mounting step whereby each chip is packaged in a resin molding. A wafer processing adhesive tape is employed to firmly retain wafer in place during the dicing step.
For this wafer processing adhesive tape there are employed adhesive tapes of the ultraviolet irradiation curing type or the electron beam curing type, which are capable of regulating the degree of adhesion besides the pressure sensitive adhesive tape. The use of either type poses the problem of chipping or fragmentation and crack, which develop during the operation of cutting the wafer into chips.
In case of the adhesive tape having an adhesive layer of the pressure sensitive type, or ultraviolet irradiation curing type or electron beam curing type, dicing sawdust produced from adhesive agent or from the substrate thereof happens to be often sticks to the surface of chip. Such sawdust could cause corrosion of the circuitry in the chip or deterioration of the bond between the chip and the resin molding so far as it causes failure of chips.
Moreover, the wafer processing adhesive tape having an adhesive layer of the pressure sensitive type, or the ultraviolet irradiation curing type or the electron beam curing type poses such problem that its service life is short because of its inferior fabrication phase stability and long-term storage stability, which problem necessitating well-managed workshop environments, transportation and storage conditions. With the wafer processing adhesive tapes of these kinds, once deterioration of the adhesive layer progressed due to some unstable factors in the manufacturing conditions or storage conditions, there used to take place production of massive quantities of off-quality chips due to qualities of the wafer processing adhesive tape.
Additionally, as regards the method for manufacturing wafer processing adhesive tapes of the pressure sensitive type, or the ultraviolet irradiation curing type or the electron beam curing type, it is the conventional practice to apply an adhesive preparation dissolved in a solvent on a substrate film, which has been manufactured beforehand and has undergone surface treatment, and evaporate the solvent. Said method charges a great ecological burden on the environment due to the use of organic solvent when applying the preparation and consumption of much energy for evaporating the solvent. Worse still, it ends up with a higher cost.
On the other hand, there is known a method for preventing chipping or partial fragmentation (hereinafter referred to as “nicks” or “nick”) and crack in the wafer processing operation which depends on wax to fix the wafer firmly in place for cutting it into chips. This method is, however, accompanied by very low productivity, so that it is not employed conventionally in the semiconductor industry for processing those wafers on which circuit patters have been already formed except when brittle wafers are processed or the wafer surface is required to be finished with high precision.
As a method for preventing breakage of chips due to spread of nick or crack, there is disclosed in Japanese Laid-open Patent Application No.1993-335411 a method for manufacturing semiconductor chips which comprises grinding wafer on its backside after cutting kerfs to specific depths from the front side of the wafer. There is disclosed in Japanese Laid-open Patent Application No.2000-68237 adoption of a sheet having an adhesive layer having a modulus of 1.0×105 Pa or more at a temperature of 40° C. as the surface protection sheet to be utilized in cutting the wafer into separate chips by grinding the backside of the wafer after having formed kerfs having depths shallower than the thickness of the wafer from the front side of the wafer on which circuit patterns have been formed. Nevertheless, it does not clearly teach the sizes of such nick and crack that would conceivably develop in the chip during the grinding operation.
Japanese Laid-open Patent Application No.1998-242086 discloses a retention sheet provided with an adhesive layer having a storage modulus of 3×106 to 1×1010 dyne/cm2 in the temperature range of 0 to 10° C. The effect of oppressing nick and crack development was evaluated merely under such very mild conditions that IC chips having nick or crack of 75 μm or less caused in the dicing operation would be rated acceptable.
Obviously, there has been available no such wafer processing adhesive tape that would be capable of minimizing the sizes of nick and crack which develop during the wafer processing to a level comparable to the one achieved according to the wax-fixing method.
Japanese Patent Publication No.1991-39524 discloses a specific α-olefin copolymer having a dynamic modulus E′ of 3×107 to 5×109 dyne/cm2 as determined at a temperature of 25° C. and a loss coefficient tan δ of 0.4 or more which it claimed to demonstrate vibration damping properties when said copolymer is laminated with a metal, although there appears no description of its specific uses as to the wafer processing adhesive tape.
Moreover, Japanese Laid-open Patent Application No. 1995-23354, No.1998-298514, No.1999-43655, No.1999-21519, and No.1999-106716 each disclose surface protection films incorporating specific α-olefin copolymer in their adhesive layers, although there appear no description about wafer processing adhesive tape on which severe requirements are imposed with respect to their in-service properties.